The development of electronic devices with printed circuit boards typically involves many steps known as a design flow. This design flow typically starts with a specification for a new electronic device to be implemented with a printed circuit board. The specification of the electronic device can be transformed into an electronic device design, such as a netlist, for example, by a schematic capture tool or by synthesizing a logical design, sometimes referred to as a register transfer level (RTL) description of the electronic device. The netlist may be specified in an Electronic Design Interchange Format (EDIF) or the like, which can describe nets or connectivity between various components or parts in the electronic device design.
The design flow may continue by verifying functionality of the electronic device design, for example, by simulating, emulating, or prototyping the electronic device design and verifying that the results of the simulation or emulation correspond with an expected output from the electronic device design. The functionality also can be verified by formally verifying with one or more solvers or statically checking the electronic device design for various attributes that may be problematic during operation of the electronic device built utilizing the electronic device design.
Once the electronic device design has been functionally verified, the design flow may utilize the logical design to generate a layout design for the electronic device. This procedure can be implemented in different ways, but typically, through the use of a layout tool, which can place and interconnect various components or parts into a representation of a printed circuit board. For example, the layout tool implemented in a computing system can present a graphical view of the printed circuit board and allow a designer to utilize the layout tool to place parts from a library onto the printed circuit board in the graphical view.
The design flow may perform one or more design for manufacturability (DFM) procedures on the layout design, which can determine whether the electronic device described in the layout design can be manufactured. The design for manufacturability procedures can include a design for fabrication (DFF) processes, a design for assembly (DFA) processes, a design for test (DFT) processes, or the like. The design for fabrication processes can determine whether a bare printed circuit board can be fabricated based on the layout design. The design for assembly processes can determine whether components can be disposed or coupled to the printed circuit board during assembly of the electronic device. The design for test processes can identify whether testing procedures can be utilized on manufactured electronic devices, for example, to detect process defects during assembly, perform electrical verification of a manufactured electronic device, or the like.
The design for test processes may be able to identify whether the electronic device, when built, can be tested by a particular fabricator to identify process defects, such as whether a component has been placed and soldered to the printed circuit board correctly. The design for test processes also may determine whether the electronic device can be electrically verified during testing procedures, for example, by performing at speed testing of the electronic device and sampling signaling at various test points in the electronic device under test. Often, however, practical constraints, such as fabricator test capabilities, space on the layout design available for test points, or the like, may result in the testing procedures to not being able to verify a portion of the electronic device. This inability to test the portion of the electronic device can reduce test coverage and leave the electronic devices built based on the layout design susceptible to undetected manufacturing-related faults. In other instances, the design for test processes may determine that a fabricator has the capability of testing manufactured electronic devices for the layout design, but the testing procedures may be time-consuming, expensive, or both than other available options. In these instances, the developer of the electronic system can decide whether to re-design the electronic device or to accept the reduced test coverage and/or more time-consuming, expensive, or both testing procedures and move forward with production of the electronic design.